1. Field of the Invention
The present invention relates to a shift register, and more particularly to a shift register capable of reducing power consumption through low frequency driving, a data driver having the same, and a liquid crystal display device.
2. Description of the Related Art
Shift registers are widely used for various flat panel display devices as well as data processing devices to sequentially process data. The flat panel display devices may process data at a high data rate according to data processing capability of the shift register.
For example, the flat panel display devices include liquid crystal display devices (LCDs), plasma display panels (PDPs), and electro luminescent displays (ELDs).
The LCDs display images by using optical anisotropy and polarization characteristics of liquid crystal. Since the liquid crystal has an elongated structure, liquid crystal molecules are aligned with directionality. The alignment direction of the liquid crystal molecules can be variously controlled by applying an electric field to the liquid crystal.
The LCDs sequentially process data provided from a graphic card by using the shift register to display images on a liquid crystal panel.
The shift register provided in the liquid crystal display devices operates as follows. The LCD mainly includes a liquid crystal panel for displaying images and a driver for driving the liquid crystal panel.
In detail, the liquid crystal panel includes a first substrate provided with thin film transistors (TFTs), a second substrate provided with a color filter and facing the first substrate, and a liquid crystal layer interposed between the first and second substrates. A plurality of gate lines and a plurality of data lines are arranged on the first substrate, and the TFTs are provided in cross sections between the gate lines and data lines.
The driver for driving the liquid crystal panel includes a gate driver for driving gate lines aligned on the liquid crystal panel, a data driver for driving the data lines, and a timing controller for controlling the gate driver and the data driver.
The gate driver provides gate scan signals to the gate lines according to a gate control signal generated from the timing controller, and the data driver provides data to the data lines according to a data control signal generated from the timing controller.
In detail, the data driver applies data voltage to the data lines according to the data control signal generated from the timing controller such that various gray scales can be expressed on the liquid crystal panel.
The data driver includes a shift register, a latch unit, and a digital-analog converter. Especially, the shift register is enabled by a clock signal having a high frequency to output sampling signals.
In order to process data at a high data rate without being influenced by noise, the shift register is driven at a high frequency so that data are provided to the data lines.
Since the data driver, exactly, the shift register is driven at a high frequency, power consumption may increase. In addition, since additional circuits must be provided in order to drive the data driver at a high frequency, a circuit part for driving the data driver may have a large size.